In an integrated circuit device such as a microcomputer, when a power supply voltage falls below a predetermined level that ensures a proper operation of the microcomputer, the microcomputer is temporarily forced into a reset state. This approach prevents the microcomputer from operating improperly.
In general, the microcomputer is held in the reset state until the power supply voltage returns to a normal level. However, if the microcomputer is used for equipment requiring high safety, it is recommended that a time period during which the microcomputer stops its operation be as short as possible.
FIG. 20 is a circuit diagram of a microcomputer 1 disclosed in JP-A-7-56885. The microcomputer 1 includes a central processing unit (CPU) 2, a read-only memory (ROM) 3, and a peripheral circuit 4 that are connected to one another through an address bus 5 for transmission and reception of an address signal and a data bus 6 for transmission and reception of a data signal.
The CPU 2 has a clock oscillator circuit 2a for generating a system clock and a clock control circuit 2b. The system clock generated by the clock oscillator circuit 2a is supplied to the ROM 3 and the peripheral circuit 4 through the clock control circuit 2b. 
The ROM 3 has a sense amplifier circuit 7 and a judgement circuit 8 that are used for monitoring the power supply voltage. The sense amplifier circuit 7 and the judgement circuit 8 output a control signal to the clock control circuit 2b when detecting that the power supply voltage drops below a predetermined level. Then, the clock circuit 2b reduces a frequency of the system clock so that a margin of an operation speed can be ensured.
In the microcomputer 1 disclosed in JP-A-7-56885, the ROM 3 monitors the power supply voltage. The power supply voltage may decrease with distance from a power source due to a voltage drop caused by resistance of a power line. Therefore, a voltage appearing at the end portion of the power line may be smaller than the voltage monitored by the ROM 3. Therefore, for example, the peripheral circuit 4 may be rendered inoperable due to an insufficient voltage, because the peripheral circuit 4 is disposed at the end portion of the power line.
Further, in the microcomputer 1, the clock frequency is evenly reduced when the drop in the power supply voltage is detected. However, a peripheral circuit such as a communication circuit may need a full clock speed and may perform no function at a reduced clock speed.